Programming the GAL22V10

In previous blog posts, I showed how the GAL16V8 operated and how to program it (see here and here).  In this blog post, I’m going to discuss the differences between the 16V8 and the 22V10. Here’s the specification sheet for the GAL22V10: Lattice GAL22V10 Specifications.

On first inspection, both devices look identical, except for the increased number of inputs and outputs.  The specifications are straightforward once you know what to expect.  If you’re familiar with the 16V8 and have never used the 22V10, there are some confusing differences.

Here’s the full fuse map for the GAL22V10:

0 - 5807 matrix

5808 S0 for OLMC 0 (active low/high)
5809 S1 for OLMC 0 (registered/combinatorial)

5810 S0 for OLMC 1
5811 S1 for OLMC 1

5812 S0 for OLMC 2
5813 S1 for OLMC 2

5814 S0 for OLMC 3
5815 S1 for OLMC 3

5816 S0 for OLMC 4
5817 S1 for OLMC 4

5818 S0 for OLMC 5
5819 S1 for OLMC 5

5820 S0 for OLMC 6
5821 S1 for OLMC 6

5822 S0 for OLMC 7
5823 S1 for OLMC 7

5824 S0 for OLMC 8
5825 S1 for OLMC 8

5826 S0 for OLMC 9
5827 S1 for OLMC 9

5828 - 5891 Signature

No PTD Fuses

You’ll notice that there are no PTD (Product Term Disable) fuses.  This device doesn’t have any.

No Common Mode Bits

Next, the mode bits are missing (the GAL16V8 had 3 modes controlled by fuses 2192 and 2193).  The OLMC modes for the GAL22V10 are built into the S0 and S1 bits.  There are only two modes: Registered and Combinatorial, controlled by the S1 bit.  Each OLMC can be programmed separately, which means that you can designate which OLMCs are Registered and which are Combinatorial.  The S0 bit controls active high and active low outputs for each OLMC.

Variable Rows per OLMC

The next complication to this device is that the matrix of fuses that control the AND gates is variable in the number of rows.  The GAL16V8 had a simple arrangement of 8 rows for each OLMC.  In the 22V10, there are a variable number of rows for each OLMC starting with 8, then incrementing by 2 for each OLMC until 16 and then decrementing by 2 until the last OLMC has 8 inputs.  You can see the number of inputs for each OLMC in the functional block diagram:

If you have an equation with 13 terms like this arbitrary example:

OUT = A*B + C + /B + A*/C + D*E + C*D + A*D*E + A*/B*D + B*/D + /B*C*E + C*E*F + E*/F + /E*C*D

You’ll need to make sure it lines up with an OLMC that has more than 12 rows.  This equation will not fit on OLMC 0, 1, 2 or OMLC 7, 8 or 9.  What this means is that you will have to rearrange your output pins for circuits that use more than 8 rows because each OLMC is tied to a specific output pin.

The number of Fuses Per Row is 44

Also, since there are more inputs, then there are also more columns in the matrix.  The number of columns is 44, which is not a round binary number.  The number of columns is determined by the total number of inputs and feedback wires.  Each input and feedback takes 2 columns (the signal and the inverse of the signal).

Preset and Reset Lines

Two extra lines can be used to control reset and set for all registers (assuming you use the registered mode).  The reset line causes the starting fuse of the first OLMC to be 44 instead of zero.  The purpose of the reset line is to reset all the registers used in the device.  You can connect any logic to the reset line to perform reset via a pin, or some combination of logic.  The same goes for the preset line, which is the line that is positioned after the last matrix row starting at fuse 5764 (row 131).

Other Differences

The clock pin is still pin 1 as in the GAL16V8.  The difference is that in the GAL16V8, the clock pin is not used at all in modes that don’t use the registers.  So pin 1 feeds fuse columns 2 and 3.  In the GAL22V10, the clock can control zero or more registered outputs because registered outputs can be selected per OLMC.  Therefore the clock pin is wired to fuse columns 0 and 1 and to the register clock inputs.

The active high/low logic is performed on the output of the D-flip/flop of the GAL22V10, where it is on the input of the GAL16V8 (controlled by an XOR gate).

Using PALASM for DOS

PALASM4 for DOS is still around.  You can go to this website and scroll to the bottom to download the RAR file (S100 Computers).  The article is rather old, but it still works.  Here are the steps I took to get this working:

1. Make sure you have DOSBOX installed.
2. Download the RAR file from the article above (or the link at the bottom of this article).
3. You can use 7-zip to unzip the RAR file.  Right-click on the RAR file and use extract files.  That will maintain the directory structure.  I used d:\palasm.
4. Start DOSBOX.
5. Type: “MOUNT c d:\palasm
6. Type: C:
7. Type: SET PALASM=c:\
8. Type: PALASM

Now you should see this screen (after the intro screen):

Select “Retrieve existing design” and type in your filename (I’m assuming you created a file, or you can copy one of the .pds files in the EXAMPLES directory.  Hit the F10 button, then use the right arrow to select the RUN menu and hit enter (Compilation is the first choice).  Then just hit F10 to compile your PDS file.  You’ll see some processing and then it should end with no errors or warnings:

You can hit ESC to return control to the menus.  Switch back to your directory in windows and you can see that an XPT and JED file was created.  Open your JED file to see the fuse map results:

Finally…

PALs and GALs are obsolete and the digital world has moved on to FPGAs.  These devices are still available and are still useful for hobby purposes.  They can be purchased through Jameco or DigiKey.  PALASM is also obsolete, hence the reason that it only exists in FORTRAN and DOS versions.

Files to download (in case they disappear from other sources on the web):

• PALASM manual
• DOSBox.zip
• PALASM.rar